military and industrial temperature ranges idt54/74fct244t/at/ct fast cmos octal buffer/line driver 1 september 2009 military and industrial temperature ranges the idt logo is a registered trademark of integrated device technology, inc. ? 2009 integrated device technology, inc. dsc-5586/4 features: ? std., a, and c grades ? low input and output leakage 1 a (max.) ? cmos power levels ? true ttl input and output compatibility: ?v oh = 3.3v (typ.) ?v ol = 0.3v (typ.) ? high drive outputs (-15ma i oh , 64ma i ol ) ? meets or exceeds jedec standard 18 specifications ? military product compliant to mil-std-883, class b and desc listed (dual marked) ? power off disable outputs permit "live insertion" ? available in the following packages: ? industrial: soic, ssop, qsop, tssop ? military: cerdip, lcc functional block diagram idt54/74fct244t/at/ct fast cmos octal buffer/line driver description: the idt octal buffer/line driver is built using an advanced dual metal cmos technology. the fct244t is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. da 0 ob 0 da 1 ob 1 da 2 ob 2 da 3 ob 3 oe b oa 0 db 0 oa 1 db 1 oa 2 db 2 oa 3 db 3 oe a
military and industrial temperature ranges 2 idt54/74fct244t/at/ct fast cmos octal buffer/line driver pin configuration symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +120 ma absolute maximum ratings (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed vcc by +0.5v unless otherwise noted. 2. inputs and vcc terminals only. 3. output and i/o terminals only. pin names description oe a , oe b 3-state output enable inputs (active low) d x x inputs o x x outputs pin description symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. note: 1. h = high voltage level x = don?t care l = low voltage level z = high impedance function table (1) inputs oe a oe b d outputs ll l l ll h h hh x z cerdip/ soic/ ssop/ qsop/ tssop top view da 0 ob 0 da 1 ob 1 da 2 ob 2 da 3 ob 3 gnd oa 0 db 0 oa 1 db 1 db 2 db 3 oa 2 oa 3 v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 oe b oe a index oa 0 db 0 oa 1 db 1 oa 2 ob 3 gnd db 2 db 3 oa 3 ob 0 da 0 oe a v cc oe b da 1 ob 1 da 2 ob 2 da 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 lcc top view
military and industrial temperature ranges idt54/74fct244t/at/ct fast cmos octal buffer/line driver 3 symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (4) v cc = max. v i = 2.7v ? ? 1 a i il input low current (4) v cc = max. v i = 0.5v ? ? 1 a i ozh high impedance output current v cc = max v o = 2.7v ? ? 1 a i ozl (3-state output pins) (4) v o = 0.5v ? ? 1 i i input high current (4) v cc = max., v i = v cc (max.) ? ? 1 a v ik clamp diode voltage v cc = min, i in = -18ma ? ?0.7 ?1.2 v v h input hysteresis ? ? 200 ? mv i cc quiescent power supply current v cc = max., v in = gnd or v cc ? 0.01 1 ma dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 5%; military: t a = ?55c to +125c, v cc = 5.0v 10% notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be tested at one time. duration of the test should not exceed one second. 4. the test limit for this parameter is 5 a at t a = ?55c. symbol parameter test conditions (1) min. typ. (2) max. unit v oh output high voltage v cc = min i oh = ?6ma mil 2.4 3.3 ? v in = v ih or v il i oh = ?8ma ind v i oh = ?12ma mil 2 3 ? i oh = ?15ma ind v ol output low voltage v cc = min i ol = 48ma mil ? 0.3 0.55 v v in = v ih or v il i ol = 64ma ind i os short circuit current v cc = max., v o = gnd (3) ?60 ?120 ?225 ma output drive characteristics
military and industrial temperature ranges 4 idt54/74fct244t/at/ct fast cmos octal buffer/line driver symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. ? 0.5 2 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max. v in = v cc ? 0.15 0.25 ma/ current (4) outputs open v in = gnd mhz oe a = oe b = gnd one input toggling 50% duty cycle i c total power supply current (6) v cc = max. v in = v cc ? 1.5 3.5 ma outputs open v in = gnd fi = 10mhz 50% duty cycle v in = 3.4v ? 1.8 4.5 oe a = oe b = gnd v in = gnd one bit toggling v cc = max. v in = v cc ?36 (5) outputs open v in = gnd fi = 2.5mhz 50% duty cycle v in = 3.4v ? 5 14 (5) oe a = oe b = gnd v in = gnd eight bits toggling notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input; (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + i cc d h n t + i ccd (f cp /2+ f i n i ) i cc = quiescent current i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = output frequency n i = number of outputs at f i all currents are in milliamps and all frequencies are in megahertz. power supply characteristics notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 54fct244t 54/74fct244at 54/74fct244ct mil. ind. mil. ind. mil. symbol parameter condition (1) min. (2) max. min. (2) max. min. (2) max. min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 1.5 7 1.5 4.8 1.5 5.1 1.5 4.1 1.5 4.6 ns t phl dx to ox r l = 500 t pzh output enable time 1.5 8.5 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.5 ns t pzl t phz output disable time 1.5 7.5 1.5 5.6 1.5 5.9 1.5 5.2 1.5 5.7 ns t plz switching characteristics over operating range
military and industrial temperature ranges idt54/74fct244t/at/ct fast cmos octal buffer/line driver 5 pulse generator r t d.u.t . v cc v in c l v out 50pf 500w 500w 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. octal link octal link octal link octal link octal link test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
military and industrial temperature ranges 6 idt54/74fct244t/at/ct fast cmos octal buffer/line driver ordering information xx temp. range fct xxxx device type xx package x process fast cmos octal buffer/line driver 244t 244at 244ct d l military options cerdip leadless chip carrier 54 74 - 55 c to +125 c - 40 c to +85 c sog pyg qg pgg industrial options small outline ic - green shrink small outline package - green quarter-size small outline package - green thin shrink small outline package - green blank b industrial mil-std-883, class b corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or 408-284-8200 logichelp@idt.com san jose, ca 95138 fax: 408-284-2775 www.idt.com datasheet document history 09/29/09 pg. 6 updated the ordering information by removing the "idt" notation and non rohs part.
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